Clients include

ASIC Design Verification Consulting
Greg White - BSEE
20 years experience in ASIC Verification

ASIC and FPGA Design Verification Consulting

Education

BSEE (Bachelor of Science in Electrical and Computer Engineering) from University of Wisconsin, Madison with emphasis on:

Experience Summary

US Citizen with over twenty years experience with logic design, verification and synthesis of digital ASICs (Application-Specific ICs) and FPGA programmable logic.

Digital Design and Verification

Mixed Signal Verification

Here is a sample of products to which I contributed individually or as part of a product team:

Open Verification Methodology
System Verilog
View Greg White's profile on LinkedIn