Clients include

ASIC Design Verification Consulting
Greg White - BSEE

20 years experience in ASIC and FPGA Circuit Design and Design Verification
US Citizen

ASIC and FPGA Design Verification Consulting

Education Summary

BSEE (Bachelor of Science in Electrical and Computer Engineering) from University of Wisconsin, Madison with emphasis on:

Experience Summary

US Citizen with over twenty years experience with logic design, verification and synthesis of digital ASICs (Application-Specific ICs) and FPGA programmable logic.

Digital Design and Verification

Open Verification Methodology
System Verilog