Clients include

ASIC and FPGA Design Verification Consulting
Greg White - BSEE
20 years experience in ASIC Verification

ASIC Design Verification Consulting


BSEE (Bachelor of Science in Electrical and Computer Engineering) from University of Wisconsin, Madison


US Citizen with over twenty years experience with logic design, verification and synthesis of digital ASICs (Application-Specific ICs) and programmable logic.

ASIC and FPGA Design and Verification

Here is a sample of products to which I contributed as part of a product team:

Open Verification Methodology
System Verilog
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